Sarek_codegen.Sarek_ir_metal_coopmatCooperative matrix (SCoopmat) for the Metal generator, lowered to MSL simdgroup_matrix (specs/coopmat-metal-simdgroup.md).
MSL offers exactly three instantiations, all 8x8 (half, float, bfloat; docs/design/f16-relaxed-accuracy.md §7 slice 6, measured on an Apple M4), and no integer one. The lowered configuration is therefore the single one whose numerics were measured and are a closed form: simdgroup_half8x8 x half8x8 + float8x8 -> float8x8, 8x8x8, bit-equal on 65536/65536 elements to "accumulator = C, then add the eight products in index order, all in binary32". Everything else is refused here, at code generation, with the reason.
Layout is the transpose_matrix flag of simdgroup_load / simdgroup_store: with elements_per_row = stride and no transpose, element (r, c) is at ptr + r * stride + c; with it, at ptr + c * stride + r. This is exactly Sarek_coopmat_types.layout.
module C = Sarek_coopmat_typesmodule Codegen_error : sig ... endval shape_8 : C.shapeThe reason integer components have no lowering, shared with the TUint8 buffer arm of the type mapper.
val check_fragment : C.fragment -> unitRefuse, at code generation, a fragment this lowering cannot represent. Total over the fragment type.
val check_config : C.config -> unitThe configurations the lowering emits a multiply-add for.
val buffer_elttype : C.fragment -> Sarek_ir_types.elttypeThe kernel buffer element type a fragment loads from or stores to.
val elttype_name : Sarek_ir_types.elttype -> stringval check_buffer :
buffers:(string * Sarek_ir_types.elttype) list ->
buf:string ->
C.fragment ->
unitval check_op :
buffers:(string * Sarek_ir_types.elttype) list ->
Sarek_ir_types.coopmat_op ->
unitval check_kernel : Sarek_ir_types.kernel -> unitWhole-kernel check, run before any source is emitted: every fragment, configuration and buffer of every cooperative-matrix statement.
val msl_elt : C.component_type -> stringval msl_type : C.fragment -> stringval transpose : C.layout -> stringval gen_op :
indent:string ->
expr_str:(Sarek_ir_types.expr -> string) ->
Sarek_ir_types.coopmat_op ->
stringgen_op ~indent ~expr_str op is the MSL for one statement. expr_str renders an index or stride expression.
val check_block : Sarek_ir_types.kernel -> (int * int * int) -> unitA simdgroup_matrix operation needs every lane of its SIMD-group active, so the block must be whole 32-wide SIMD-groups; refused before any compile.